1. Field of the Invention
This invention relates generally to signal processing systems and methods, and more particularly to a method and system for increasing the maximum speed achievable from an A/D converter employing a 1-bit folding front end.
2. Description of the Prior Art
Video application techniques are constantly being improved and require increasingly faster methods and systems to support the newer applications. One device that can be used to support fast video applications is a flash analog-to-digital (A/D) converter that has a 1-bit folding front end. A solution that can be used to increase the speed of such a device employs a polarity detector to detect whether an input sample is positive or negative. The 1-bit folder uses the output of the polarity detector to reverse the polarity of a sample/hold device whenever the input sample is negative. In this way, the A/D converter only sees positive signals, which reduces by one-half, the number of comparators required by the A/D converter.
The foregoing solution requires that any polarity detection scheme be very precise. Any errors can cause the 1-bit folder to operate improperly, resulting in negative input signals at the comparator array. This solution will therefore require additional comparators to process the negative signals, which undesirably increases integrated circuit (IC) surface area and power requirements.
In view of the foregoing, a need exists for a polarity detection scheme that is precise as well as fast and that minimizes polarity detection errors sufficiently to eliminate any necessity to employ additional comparators associated with a flash A/D using a folding front-end.
The present invention is directed to a fast acting polarity detection system and method to increase the speed of a flash A/D converter that employs a folding front-end. According to one embodiment, a system includes a single nxe2x88x921 bit flash A/D converter that receives input signals from a 1-bit folder. An input signal is first sampled and held by a sample and hold circuit. Simultaneously, a very fast polarity detector (zero crossing detector) detects whether the input signal is positive or negative and immediately controls the 1-bit folder. The 1-bit folder, which is actually a polarity reverser, uses the output of the polarity detector to reverse the polarity of the sample and hold output signal whenever the signal is negative. The A/D will therefore see only positive signals, which reduces the number of comparators required for signal processing by one-half. The very fast polarity detector is a coarse polarity detector that operates to increase the speed of the flash A/D. A more precise polarity detector that provides a higher level of accuracy is also employed such that when the output of the precise polarity detector becomes available, it overrides the output of the fast polarity detector to eradicate any erroneous signals produced by the very fast polarity detector. This technique does not adversely affect the speed of the A/D since potential signal errors only occur at small signal levels due to device imperfections such as those associated with offset voltages, even though the precise polarity detector operates more slowly than the very fast polarity detector.
In one aspect of the invention, a technique is implemented to increase the operating speed of a flash A/D converter that reduces by one-half the number of comparators required by the A/D converter.
In another aspect of the invention, a technique is implemented to increase the operating speed of a flash A/D converter beyond operating speeds capable using presently known architectures.
In yet another aspect of the invention, a technique is implemented to increase the operating speed of a flash A/D converter while simultaneously minimizing IC surface area and power requirements necessary to operate the flash A/D converter.
In still another aspect of the invention, a technique is implemented to increase the operating speed of a flash A/D converter with no adverse impact on precision.